1. Field of the Invention
The present invention generally relates to a memory device and a memory apparatus using the same and, more particularly, to a memory device which functions as a neuron element and a memory apparatus using the same suitable for a neural network.
2. Description of the Related Art
In recent years, extensive studies have been made on data processing using neural networks, and neural networks are used in a variety of applications such as pattern recognition for graphic and character patterns, speech recognition, mechanical control of a robot or the like, and recognition processing, data compression, and image reproduction in an expert system or the like. In particular, the field of recognition is regarded as one of the fields to which a neural network can be easily applied.
As opposed to a conventional Neuman computer suitable for serial data processing mainly using numeric values and symbols, neural networks are regarded to be suitable for parallel processing calculation models. More specifically, neural networks are suitable for realizing calculation models simulating functions and structures of a brain and neural network of a living body. A system having these functions and structures realized by electronic circuits, optical circuits, and the like is called a neuro-computer.
FIG. 14 shows a structure of a nerve cell (neuron) of a living body. The nerve cell is divided into synapses 1, dendrites 2, axis cylinders 4, and a cell body 6 in accordance with data processing functions. One neuron is regarded as one logic operation circuit when each neuron is exemplified as an electronic circuit. Each synapse 1 serves as an interface for receiving signals from other neurons. A signal input to this synapse 1 is transmitted to the cell body 6 through the corresponding dendrite 2 (input line). The cell body 6 adds inputs input from the plurality of dendrites 2. When the sum exceeds a predetermined value, this neuron outputs a signal to the next neuron through the corresponding axis cylinder 4 (output line). Each synapse 1 takes an excitatory or inhibitory action. A signal input from an excitatory synapse serves to increase a signal level of the cell body 6. A signal input from an inhibitory synapse serves to decrease the signal level of the cell body 6. When the synapse 1 is to transmit a signal to the cell body 6, the intensity of an output signal is changed in accordance with a source neuron of the input signal. The signal intensity is called a coupling weighting coefficient. A memory function and a processing capacity of a neural network in a living body are generally deemed to depend on a way of connections between neurons and a pattern formed by weighting coefficients of these neurons.
A human brain is said to have about 10.sup.10 neutrons. Since a large number of data are subjected to parallel processing in the neural network, a very large amount of data can be processed per unit time although an operating frequency of one neuron is low.
When a neural network model is formed on, e.g., an LSI chip on the basis of the data processing technique of a human brain, a high-speed practical system can be arranged at low cost. As a result, data processing without using any program can be realized, and a software development load which is increasing year by year can be reduced. In addition, this system is expected to facilitate future developments in image recognition, pattern recognition, and speech recognition, which are difficult to handle in conventional serial processing computers.
Taking the extensive studies on data processing techniques into account, studies and developments for realizing neural network hardware (i.e., a neuro-chip) have been positively made. The types of signals to be processed in such a neuro-chip are classified into a current (or voltage) signal and an optical signal. Signals to be processed by an electrical neutron are classified into analog and digital signals.
A neuro-chip for processing an analog electrical signal will be described below. An arrangement of the simplest neuro-chip will be described below. That is, the arrangement is constituted by a plurality of operation elements each for outputting y given below in response to an input xi (i=1, 2, 3, . . . , n): ##EQU1##
The operating elements correspond in analogy to neurons in a neural network in a living body in operation and are generally called neuron elements.
An equivalent circuit of such a neuron element is arranged by an electronic analog circuit, as shown in FIG. 15.
In a transient state, the following equation can be obtained by the Kirhihoff's law: ##EQU2##
In a steady state, dui/dt=0 is obtained, so that ##EQU3##
When .theta. is substituted into -Ii in equation (4) and Ri=1, equation (4) coincides with equation (2). In this case, ui corresponds to X.
When a function g(ui) of an amplifier is exemplified as follows: ##EQU4##
If .lambda. is set to 0, the function g(ui) coincides with equation (1).
Attempts for realizing neural network chips having analog neurons as described above have been positively made. In this case, it is very important to determine the type of element to be used as each resistor wi in FIG. 15.
The resistor wi serves as a weighting element for receiving each input signal xi, i.e., serves as a circuit element corresponding to the synapse 1 in a neuron. This resistor wi is constituted by a type using an ON resistance of a MOS transistor, a type using the number of ON transistors, a type for turning on/off a transistor using a RAM, a type using Amorphous Si:H, and a type using MNOS as follows:
In the types using the ON resistances of MOS transistors or the number of ON transistors as the resistors wi, operations of all parts including a memory unit are performed by only transistors. Therefore, the number of transistors is very large, and the circuit arrangement is very complicated.
In the types wherein a memory unit for storing the resistors wi serving as weighting elements is obtained by using a transistor circuit (i.e., an arrangement including a RAM), or MNOS, a storage value is a unipolar value (i.e., either positive or negative). However, synapses of neurons are generally classified into excitatory and inhibitory synapses as described earlier. In order to perform identical actions to these synapses in an electronic circuit, the weighting element wi must have a bipolar value (both positive and negative). In a circuit wherein a value of a weighting element wi is set by using a memory having a unipolar value, a circuit must be constituted by two areas, i.e., an area in charge of positive (excitatory) coupling and an area in charge of negative (inhibitory) coupling. For this reason, the number of elements is increased, and the circuit arrangement is further complicated. In addition, signal processing is also complicated.
When amorphous Si:H is used for the resistor, the amorphous Si:H film must perform both an operation for storing the resistor element wi and coupling (current control), thus advantageously reducing the number of elements. However, the wi value is a unipolar value as in the previous elements, and complication of the circuit and signal processing is not yet avoided. In addition, since an electrical resistance of amorphous Si:H is relatively large, a signal processing speed is low, resulting in inconvenience.